| 1. | The present output Qn, of an edge triggered JK flip-flop is logic If J = 1, then Qn+1 ? | |
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cannot be determined
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will be logic 0
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will be logic 1
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will race around
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Report Question| 2. | One of the following states is not allowed for an SR flip-flop ? | |
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S=0; R = 0
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S=1; R = 0
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S = 1; R = 1
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S=0; R = 1
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| 3. | Without any additional circuitry, an 8 : 1 MUX can be used to obtain ? | |
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some but not all Boolean functions of 3 variables
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all functions of 3 variables but none of 4 variables
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all functions of 3 variables and some but not all of 4 variables
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all functions of 4 variables
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| 4. | For a JK flip-flop, Qn, is the output at time step t,,. Which of the following Boolean expressions represents Qn+1 ? | |
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JnQ’n+K’nQn
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JnQn+KnQ’n
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J’nQn+KnQ’n
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JnQn+K’nQ’n
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| 5. | The excitation value, if Qn = 1 and Qn+1=0 for JK flip-flop, is ? | |
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J=0, K = X
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J= X, K = 0
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J=X. K = 1
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J=0, K = 1
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| 6. | If tp, is pulse width, ?t is the propagation delay, T is period of pulse train then the following condition can avoid the race around condition ? | |
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tp = ?t = T
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2tp> ?t > T
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2tp T
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2tp < ?t < T
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| 7. | Which one of the following statements is not correct ? | |
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An 8 input MUX can be used to implement any 4 variable function
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A 3 line to 8 line DEMUX can be used to implement any 4 variable function
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A 64 input MUX can be built using nine 8 input MUXS
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A 6 line to 64 line DEMUX can be built using nine 3 line to 8 line DEMUXs
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| 8. | 2-to-1 line multiplexer can be realized using ? | |
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1 NAND, 2 OR and I NOT gates
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2 NAND, 2 OR and 1 NOT gates
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2 NAND, 1 OR and 2 NOT gates
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2 NAND, 1 OR and 1 NOT gates
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| 9. | Multiplexer can be expressed as ? | |
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one-to-many
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many-to-one
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many-to-many
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one-to-one
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| 10. | Which one of the following statements describes the operation of a multiplexer ? | |
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A logic circuit used to generate coded output
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A logic circuit used to generate F's complement
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A logic circuit that accepts two or more inputs and allows one of them at a time to get through the output
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A logic circuit that transmits one input to several output lines
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