| 1. | The minimum number of 2-input NAND gates required to implement the Boolean function Z= AB’C, assuming that A, B and C are available, is ? | |
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two
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three
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five
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six
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Report Question| 2. | The Boolean expression Y(A, B, C) = A + BC is to be realized using 2-input gates of only one type. What is the minimum number of gates required for the realization ? | |
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1
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2
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3
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4 or more
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| 3. | The standard form of F(A, B, C) = A + B + C is ? | |
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ABC + BC’A
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ABC+ BCA’ + B’CA
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A’B’C’ + ABC
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ABC + AB’C + ABC’ + AB’C’ + A’BC + A’BC’ + A’B’C
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| 4. | Logic gate minimization is done by ? | |
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K-map
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S-map
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microprocessors
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None of the above
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| 5. | When eight adjacent 1's grouped horizontally or vertically, the group so found is called ? | |
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pair
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quad
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octet
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hex
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| 6. | In a 4-variable K-map, a 2-variable product term is produced by ? | |
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a 2 cell group of 1s
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a 4 cell group of 0s
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a 4 cell group of 1s
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an 8 cell group of 1s
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| 7. | Which one of the following symbols is not used in a don't care in majority of texts ? | |
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d
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x
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?
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n
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| 8. | Tabular method of simplification is convenient as long as the number of variables does not exceed ? | |
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6
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8
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10
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12
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| 9. | The Boolean functions can be expressed in canonical SOP (sum of products) and POS (product of sums) form. For the function, Y=A+ B.C, which are such two forms ? | |
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Y= ?(1, 2, 6, 7) and Y = II(0, 2, 4)
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Y = ?(1, 4, 5, 6, 7) and Y = II(0, 2, 3)
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Y = ?(1, 2, 5, 6, 7) and Y = II(0, 1, 3)
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Y=?(1, 2, 4, 5, 6, 7) and Y = II(0, 2, 3, 4)
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| 10. | The POS form of expression is suitable for circuit using ? | |
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XOR
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NAND
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AND
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NOR
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